Rust · HAMPU Systems

One workspace for every core in your SoC.

Consortium pairs a Linux-capable A-core with Cortex-M, Cortex-R, or RISC-V real-time cores — the heterogeneous, asymmetric multiprocessing (HAMPU) pattern behind modern i.MX9 and STM32MP2 SoCs — with typed IPC, explicit cross-core contracts, and codecs built for the boundary.

Read the docs View source
mcu/src/main.rs · CM33
let connected = init().connect().await?; let mut sensor = connected.sensor; let reading = SensorReading { temperature_mdc: read_sensor(), seq, }; sensor.send(&reading).await?; // -> ipcc1 rings, CA35 wakes, decodes via IpcSafe

Explicit contracts across the core boundary

The Linux host sits at the center — talking down to the real-time controller, up into the secure world, left to the kiosk interface, and right into the broader ecosystem.

Trustzone
OP-TEE
Teaclave · secure world
TeeParam / SMC
Host
Linux
tokio · aarch64 / armv7
Interface
WPE WebKit
Cog · kiosk
Ecosystem
Integration
ros · zenoh · onnx
Channel<Tx/Rx> + Doorbell
Controller
Bare Metal
embassy · arm / riscv
CAN / UART
Wired
Remote Controller
ESC · RC receiver
Trustzone
OP-TEE
Teaclave · secure world
TeeParam / SMC
Interface
WPE WebKit
Cog · kiosk
Host
Linux
tokio · aarch64 / armv7
Ecosystem
Integration Layers
ros · zenoh · onnx
Channel<Tx/Rx> + Doorbell
Controller
Bare Metal
embassy · arm / riscv
CAN / UART
Wired
Remote Controller
ESC · RC receiver

Some feature are in development stage.

One manifest drives the whole build.

csti build reads Consortium.toml, compiles every endpoint, and stages a deployable tree — app, firmware, TA, DTS, systemd unit.

[profile] chip = "stm32mp257fak3" devkit = "stm32mp257f-dk" shared = "../shared" deploy_root = "/opt/consortium" [[ipc.channel]] name = "sensor" doorbell = "ipcc1" pattern = "memory" primary = "linux" secondary = "cm33" party.linux = { chan = 0, type = "Command" } party.cm33 = { chan = 1, type = "SensorReading" }

One log stream, both cores

consortium-dbg carries defmt frames off the M-core over shared memory; consortium-log's facade decodes them into tracing spans beside the host's own logs.

cargo run -p melt-pot-stm32mp25-app
2026-07-11T13:18:17.601238Z TRACE consortium_dbg::host: HostRing::from_raw_parts(base = 0xffffb3646000, len = 0x2000) 2026-07-11T13:18:17.601463Z TRACE consortium_dbg::host: HostRing::from_raw_parts: descriptor capacity = 0x2000, read_ptr = 0x10, write_ptr = 0x552 2026-07-11T13:18:17.601764Z TRACE consortium::dbg: consortium controller init: time driver bring-up core="cm33" 2026-07-11T13:18:17.601837Z TRACE consortium::dbg: consortium controller init: RCC register block at 0x44200000 core="cm33"

A crate for every layer

From wire protocol to human interface, each concern is its own crate.

Supported chips & targets

Linux A-core, bare-metal M-core, RISC-V — checked and built today.

A-core · Linux
aarch64-unknown-linux-gnu armv7-unknown-linux-gnueabihf
M-core · bare metal
thumbv8m.main-none-eabihf thumbv7em-none-eabihf
RISC-V
riscv32imc-unknown-none-elf riscv32imac-unknown-none-elf riscv32imafc-unknown-none-elf